In a manufacturing process of a semiconductor device, etching is performed on a silicon substrate to form, for example, trenches for device isolation or capacitors. For instance, in the course of forming trenches for DTI (Deep Trench Isolation) or trenches for memory cells and capacitors, a silicon etching is performed to form grooves or holes of high aspect ratios with opening diameters ranging from about 0.8 to about 1.2 μm and depths ranging from about 5 to about 8 μm on a Si substrate. Further, in fabricating a 3-dimensional package device or a MEMS (Micro Electro Mechanical System), an etching is performed to form through holes for interconnection or grooves for mechanical structures on a Si substrate at depths of equal to or greater than 100 μm.
In the above silicon etching process, a SF6/O2 gas is widely employed as an etching gas together with an oxide film mask such as a SiO2 film.
However, when using the SF6/O2 gas, there occur problems that undercuts tends to be formed right under the mask and a sufficient selectivity against the oxide film mask is not obtained. To solve the problems, there has been proposed using a SF6/O2/SiF4 gas as an etching gas (see, for example, Japanese Patent Laid-open Application No. 2004-87738 (for example, Claims): Patent Reference 1).
It is possible to prevent the undercuts and improve mask selectivity by using the SF6/O2/SiF4 gas as an etching gas, as in the Patent Reference 1. However, it is confirmed that a number of small holes called “pits” are formed on the oxide film mask when performing the plasma etching using the above etching gas. If the pits grow during the silicon etching process and reach the silicon through the oxide film mask, various adverse effects might be caused on the semiconductor device.
FIGS. 15A to 15E illustrate cross sectional views to show a surface structure of a semiconductor wafer, and they provide schematic illustrations of a formation and a growth of pits during a silicon etching process in which a SF6/O2/SiF4 gas is used as an etching gas. FIG. 15A shows a state where a SiO2 layer 202 is formed on a silicon substrate 201, and a resist 203 is formed on the SiO2 layer 202. The SiO2 layer 202 is provided with an opening 210 etched according to a pattern of the resist 203. The etching of the SiO2 layer is performed by using, e.g., a gas system such as Ar/CxFy/O2 containing a fluorocarbon compound such as C4F6 and C5F8 (x and y of the CxFy represent the stoichiometric numbers), and during the etching, reaction products such as SiO, SiOF, SiCF are generated to stick to a sidewall or a surface of the resist 203 as deposits 204.
FIG. 15B illustrates a state after removing the resist 203 by ashing, a wet processing, or the like. The deposits 204 still remain on the surface of the SiO2 layer without being removed from the semiconductor wafer completely. The remaining deposits 204 then become nuclei of pits. That is, as shown in FIG. 15C, in case the etching resistance of the deposits 204 is stronger than that of the SiO2 layer 202, vicinities of the deposits 204 are selectively etched during the etching process of the silicon substrate 201, whereby micro trenches 211 are formed. Since it is difficult for reaction products (deposits) of the etching to stick to the inside of the micro trenches 21 and there occurs an ion concentration to bottoms of the micro trenches 211, etching rate of the micro trenches 211 becomes higher than that of other portions of the SiO2 layer 202. As a result, the depths of the micro trenches 211 increase as the silicone etching progresses, so that the micro trenches 211 grow into pits 212, as shown in FIG. 15D. If a pit 212 reaching the silicon substrate 201 is formed as shown in FIG. 15E, the reliability of the semiconductor device would be deteriorated.
Even after the resist 203 is peeled off after etching the SiO2 layer 202 by using the patterned resist 203 as a mask, the deposits 204 that would become nuclei of the pits 212 remain on the SiO2 layer 202, thereby forming the micro trenches 211. As a consequence, the micro trench 211 causes the pits formation. For the reason, it may be possible to prevent the formation of the micro trenches 211 and their growth into the pits 212 if the resist 203 remain as the mask until the endpoint of the silicon etching by way of setting the film thickness of the resist 203 to be sufficiently large in advance. However, if the silicon etching is performed by using only the resist 203 as the mask until the endpoint of the silicon etching, it becomes difficult to control profiles of trenches of high aspect ratios that are formed in the silicon, whereby sidewalls of the trenches become slanted, forming bowing shapes. This problem is deemed to be due to the following reason: Since the resist 203, not an oxide film (SiO2 layer 202), is used as the mask, carbon of the resist reacts with and etch protection films (SiO, SiOF) of the sidewalls of the trenches. As a consequence, the silicon etching progresses in lateral directions.